📜  Verilog时间格式

📅  最后修改于: 2021-01-11 15:02:37             🧑  作者: Mango

Verilog时间格式

Verilog timescale指令指定仿真的时间单位和精度。

Verilog $ timeformat系统函数在$ display$ strobe等显示语句中指定%t格式说明符报告样式。

句法

$timeformat(, , , );
  • unit_number是源代码中使用的所有`timescale指令中最小的时间精度。
  • precision表示当前时间范围的小数位数。
  • suffix_string是用于在实时值旁边显示比例的选项。
Unit Number Time Unit
-3 1ms
-6 1us
-9 1ns
-12 1ps
-15 1fs

例1:1ns / 1ps

以下是$ timeformat如何影响时间单位显示格式的示例。

`timescale 1ns/1ps

module tb;
  bit a;

  initial begin

    // Wait for some time
    // precision is 1/1000 of
 the main scale (1ns), the 3rd position will truncate
 this delay 
    #10.512351;

    // Display current time with default timeformat parameters
    $display("[T=%0t] a=%0b", $realtime, a);

    // Change timeformat parameters and display again
    $timeformat(-9, 2, " ns");
    $display("[T=%0t] a=%0b", $realtime, a);

    // Remove the space in suffix, and extend fractional digits to 5
    $timeformat(-9, 5, "ns");
    $display("[T=%0t] a=%0b", $realtime, a);

    // Here suffix is wrong, it should not be "ns" because we are
    // setting display in "ps" (-12)
    $timeformat(-12, 3, " ns");
    $display("[T=%0t] a=%0b", $realtime, a);

    // Correct the suffix to ps
    $timeformat(-12, 2, " ps");
    $display("[T=%0t] a=%0b", $realtime, a);
  end
endmodule

现在执行上面的代码,它将给出以下输出,例如:

xcelium> run
[T=10512] a=0
[T=10.51 ns] a=0
[T=10.51200ns] a=0
[T=10512.000 ns] a=0
[T=10512.00 ps] a=0
xmsim: *W,RNQUIE: Simulation is complete.

示例2:1ns / 100ps

我们从上方考虑同一示例,但时间跨度不同。

`timescale 1ns/100ps

module tb;
  bit a;

  initial begin

    // Wait for some time 
    // precision is 1/1000 of
 the main scale (1ns), the 3rd position will truncate
 this delay 
    #10.512351;

    // Display current time with default timeformat parameters
    $display("[T=%0t] a=%0b", $realtime, a);

    // Change timeformat parameters and display again
    $timeformat(-9, 2, " ns");
    $display("[T=%0t] a=%0b", $realtime, a);

    // Remove the space in suffix, and extend fractional digits to 5
    $timeformat(-9, 5, "ns");
    $display("[T=%0t] a=%0b", $realtime, a);

    // Here suffix is wrong, it should not be "ns" because we are
    // setting display in "ps" (-12)
    $timeformat(-12, 3, " ns");
    $display("[T=%0t] a=%0b", $realtime, a);

    // Correct the suffix to ps
    $timeformat(-12, 2, " ps");
    $display("[T=%0t] a=%0b", $realtime, a);
  end
endmodule

上面的代码产生以下输出:

xcelium> run
[T=105] a=0
[T=10.50 ns] a=0
[T=10.50000ns] a=0
[T=10500.000 ns] a=0
[T=10500.00 ps] a=0
xmsim: *W,RNQUIE: Simulation is complete.

例3:100ns / 1ns

`timescale 100ns/1ns

module tb;
  bit a;

  initial begin

    // Wait for some time - note that because precision is 1/1000 of
    // the main scale (1ns), this delay will be truncated by the 3rd
    // position
    #10.512351;

    // Display current time with default timeformat parameters
    $display("[T=%0t] a=%0b", $realtime, a);

    // Change timeformat parameters and display again
    $timeformat(-9, 2, " ns");
    $display("[T=%0t] a=%0b", $realtime, a);

    // Remove the space in suffix, and extend fractional digits to 5
    $timeformat(-9, 5, "ns");
    $display("[T=%0t] a=%0b", $realtime, a);

    // Here suffix is wrong, it should not be "ns" because we are
    // setting display in "ps" (-12)
    $timeformat(-12, 3, " ns");
    $display("[T=%0t] a=%0b", $realtime, a);

    // Correct the suffix to ps
    $timeformat(-12, 2, " ps");
    $display("[T=%0t] a=%0b", $realtime, a);
  end
endmodule

注意:#1代表100ns,因此#10产生1000ns。

输出看起来像:

xcelium> run
[T=1051] a=0
[T=1051.00 ns] a=0
[T=1051.00000ns] a=0
[T=1051000.000 ns] a=0
[T=1051000.00 ps] a=0
xmsim: *W,RNQUIE: Simulation is complete.